Engineering Roles

Role-oriented Portfolio

I am preparing for radar signal-processing and FPGA verification roles. Each section links the projects, hardware, and tools I used.

SECONDARY

FPGA RTL/DV Engineer

Parameterized RTL, reference models, self-checking testbenches, architecture equivalence, and deterministic regression.

PRIMARY

ECG/SCG/FMCW alignment, phase displacement, beat segmentation, SQI, and morphology-based candidate timing.

SUPPORTING

STM32, ESP32, and Raspberry Pi acquisition with TCP/IP, GPIO/I²C, and sensor-to-alarm integration.

SUPPORTING

PPG timing integrity, IBI/HRV feature construction, CNN+Transformer evaluation, and metric-condition comparison.

SUPPORTING

Requirements traceability, quantitative trade-offs, verification boundaries, reliability, and maintainability.