Week 08

FSM States and Transitions

I revisit my VHDL sources, schematics, and waveforms from combinational logic through finite-state machines.

Controller Logic Design course visual
Course visual for this study sequence.

What I connect in this unit

A state diagram visualizes input-driven transitions, and state encoding assigns those states to flip-flop bits. Separating next-state logic from output logic makes the dependency on current state and input explicit.

Concept map

  1. State diagrams
  2. State encoding
  3. Next-state logic
  4. Output logic

Technical anchor

Encoding three states S0, S1, and S2 as 00, 01, and 10 leaves 11 unused, so a recovery transition from 11 back to S0 should be defined.

How I review it

Tabulate next state and output for inputs zero and one in every state, then check coverage of all combinations and recovery from unused encodings.

Connection to the full course

Unit 8 of 12. Unit numbers are a reading sequence reconstructed from the saved designs, not an attendance-week record.

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