Biomedical Sensor · Analog Circuit · KiCad PCB

STM32F411 PPG Analog Front-End PCB

A two-layer PPG board combining two SFH7070 sensors, OPA2333 analog front ends, and STM32F411. KiCad, Gerber, and drill files.

KiCad source and fabrication outputs

⌘ Repository

Open the files

STM32F411 PPG PCB

SFH7070 · OPA2333 · two layers

Schematic, PCB, Gerber Design details

Problem

The task was to place a small-signal optical front end alongside MCU clocks and digital interfaces while managing power and return paths on one PCB.

Architecture

Two SFH7070 sensors → OPA2333 amplification/filter stages → STM32F411 ADC A0/A1 → UART, with SWD debug and 8-MHz/32.768-kHz clocks.

Hardware and Software

KiCad
STM32F411RETx
SFH7070
OPA2333
SPX3819
SWD
UART
Gerber

Data Flow

Optical sensor → analog amplification/filter → MCU ADC → digital processing/UART, with 5-V input → 3.3-V LDO → analog/digital rails.

Methodology

Split functions into STM and Analog hierarchical sheets
Arranged analog-input components relative to the MCU, clocks, and connectors
Exported copper, mask, paste, silkscreen, and drill files as one fabrication package

Results

Created an approximately 80.6 × 52.2 mm two-layer PCB
Confirmed 69 modules, 83 nets, 602 tracks, and 56 plated holes
Completed a fabrication handoff from KiCad source through Gerber and drill files

Architecture and result views

Control-logic map connecting the STM32F411 MCU, 3.3-V regulator, two clocks, SWD, UART, and A0/A1 inputs — Power, clock, debug, and communication control logic extracted from STM.sch

PPG analog-front-end logic connecting two SFH7070 sensors, input RC networks, OPA2333 stages, and STM32 A0/A1 ADC inputs — Sensor-to-ADC signal chain for both PPG channels identified in Analog.sch

LQFP-64, SFH7070, SOIC-8, and SOT-23-5 footprint pad arrangements reproduced from the KiCad PCB source — KiCad footprint and decal set for the MCU, sensors, op amps, and LDO

Enlarged PCB layout of the STM32F411, 8-MHz and 32.768-kHz clocks, SWD/UART headers, and LDO placement — Enlarged MCU, clock, power, debug-interface placement, and fan-out routing

Enlarged analog-front-end PCB layout showing two SFH7070 sensors and the component routing around three OPA2333 packages — Enlarged analog-front-end placement grouping the sensors, input networks, and active-filter stages

Fabrication-layer view rendered directly from the F.Cu copper, F.Mask opening, and F.SilkS Gerber files — Front copper, mask, and silkscreen layers rendered directly from the fabrication Gerbers

Back side of the STM32F411 PPG PCB showing ground copper and vias — Bottom-side ground copper used for signal return paths

What I worked on

Built STM32F411RETx power, clock, SWD, and UART circuitry
Laid out two SFH7070 inputs and OPA2333-based low-noise analog paths
Added a bottom ground plane, routed two layers, and generated fabrication files

Code and results

KiCad hierarchical schematic and PCB source
Front/back copper, mask, paste, and silkscreen Gerbers
PTH/NPTH drill and Gerber job files

Design scope and next steps

Available artifacts: schematics, routing, and fabrication outputs. Follow-up measurements: PPG waveforms, SNR, filter cutoff, and biosignal accuracy.

Project resources

Repository

Two SFH7070 sensor signals pass through OPA2333 amplification/filter stages into STM32F411 ADC A0/A1. The two-layer board includes a 5-V input, 3.3-V LDO, 8-MHz/32.768-kHz clocks, SWD, UART, and bottom-side ground copper.