STM32 · Embedded · 07
Connecting CMSIS-DSP Biquad Filters
The 250 Hz ECG sources implement 40 Hz low-pass and 0.5 Hz high-pass stages using DF1 or DF2T cascades. The PPG source instead separates a 0.5 Hz high-pass and 8 Hz low-pass, so I do not reuse ECG coefficients unchanged.

What I checked first
The 250 Hz ECG sources implement 40 Hz low-pass and 0.5 Hz high-pass stages using DF1 or DF2T cascades. The PPG source instead separates a 0.5 Hz high-pass and 8 Hz low-pass, so I do not reuse ECG coefficients unchanged.
Source view
- ARM_MATH_CM4, FPU settings, source files, and include paths must all agree.
- I separate the filter instance, coefficient array, state buffer, and blocksize=1 roles.
- The sources preserve coefficient structures, but I did not recreate a measured frequency response.
Code path
arm_biquad_cascade_df2T_init_f32(
&ECG_Filter, numStage_ECG,
IIR_Coeffs_ECG, pState_ECG);
arm_biquad_cascade_df2T_f32(
&ECG_Filter, &Raw_Voltage,
&ECG_Filtered, 1);
Key terms
- CMSIS-DSP
- DF2T
- coefficient
- state buffer
Review sequence
- CMSIS-DSP
- DF2T → coefficient
- state buffer
Official references
- STM32CubeF4 Getting Started (UM1730)
- STM32 DSP with CMSIS (AN4841)
- Arm CMSIS-DSP
- STM32CubeF4 repository
The reviewed sources contain 22 prototype photos, a 40-slide STM setup deck, a three-page KiCad schematic, an ADC/UART note, an HRV module, two PPG code records, twelve top-level ECG C variants, and a complete CubeIDE project archive. I do not count byte-identical variants or ST/Arm vendor files as separate results, and I make no new performance claim without saved measurements.