Hyeongrok Ryu Engineering Portfolio

Electrical Engineering Coursework · High-Frequency Engineering

From a 3.5 GHz Microstrip to Wilkinson and Branch-Line Networks

2026-08-01 · updated 2026-08-01 · Hyeongrok Ryu

My review of alumina microstrip calculations and stored Cadence divider and hybrid screens.

Series
RF and Microwave · 3
Type / level
study-note · intermediate
Tools
Cadence Virtuoso, Smith Chart
01Starting conditions

A checkpoint in the study sequence for this note.

02Width and length

A checkpoint in the study sequence for this note.

03Reading the 3.7 GHz marker

A checkpoint in the study sequence for this note.

04Wilkinson divider

A checkpoint in the study sequence for this note.

A compact concept path generated from this post's table of contents.

Starting conditions

I began by collecting the shared assumptions from my RF coursework: a 0.5 mm alumina substrate, relative permittivity 9.9, and a 3.5 GHz design frequency. Those values set the microstrip width, guided wavelength, and quarter-wave sections used by both passive networks.

Alumina microstrip and stored 3.7 GHz marker beside Wilkinson and branch-line dimensions
The left panel keeps the transmission-line calculation together; the right panel compares the dimensions entered for the two networks.

Width and length

The calculated width for a 50 Ω line was about 0.4815 mm. A 270° delay at 3.5 GHz is three quarters of the guided wavelength, giving a length near 24.97 mm. I initially confused the free-space wavelength with the shorter guided wavelength on alumina; separating them made the report value consistent.

ItemValueUse
Relative permittivity9.9Alumina
Substrate height0.5 mmShared condition
50 Ω widthabout 0.4815 mmMicrostrip calculation
270° lengthabout 24.97 mmat 3.5 GHz
I converted µm and mm values to one unit before comparing the designs.

Reading the 3.7 GHz marker

A stored Cadence screen marks approximately −0.095 dB insertion loss and −284.49° phase at 3.7 GHz. The accumulated phase is larger than the 270° target at 3.5 GHz, which is consistent with observing the same line at a higher frequency. These are values read from the earlier simulation screen, not instrument measurements.

Wilkinson divider

An equal-split Wilkinson uses two theoretical 70.7 Ω quarter-wave branches. The stored design tuned the resistor from 100 Ω to 94 Ω and used branch width 270 µm and length 6.65 mm. The screen places S21 and S31 near −3 dB and S11 near −15 dB. I treat the notch position and center-frequency alignment as items to check again instead of describing the match as perfect.

Saved Cadence S-parameter view with S11, S21, S31, and S23 traces
I read the split and matching markers together on the saved screen.
NetworkTransmission lineReading from stored screen
Wilkinson70.7 Ω, W 270 µm, L 6.65 mmS21/S31 near −3 dB, S11 near −15 dB
Branch-line35.35 Ω horizontal, 50 Ω verticalcenter shift in split and isolation curves
Keeping theoretical impedance and entered geometry in separate columns made the tuning step easier to follow.

Branch-line hybrid

The quadrature hybrid forms a rectangle with 35.35 Ω horizontal lines and 50 Ω vertical lines. The stored dimensions were W 908 µm and L 7.0 mm horizontally, then W 483 µm and L 7.2 mm vertically. Drawing the two widths separately helped me remember why the four sides do not share one impedance.

Saved branch-line hybrid schematic with four ports and different horizontal and vertical microstrip widths
The saved Cadence schematic makes the port order and four line sections visible.

Simulation-only interpretation

This note connects calculations in the report to earlier Cadence screens. I did not rerun the netlist or measure a fabricated network with a VNA. My next step is to recreate the same sweep and inspect marker frequency, port definitions, and dB conventions together.

Sources used

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